Education In Pakistan

Papers, Notes, Books & Help For Students

UPDATED EDUCATIONAL NEWS INTERVIEW HELP FOR ALL JOBS ONLINE BOOKS SCHOLARSHIPS AVAILABLE INTERNSHIP JOBS

Tag: VU. CS501-.Advance. Computer. Architecture (S4). MID-TERM. EXAMINATION. SEMESTER .FALL .2004

VU CS501-Advance Computer Architecture (S4) MID-TERM EXAMINATION SEMESTER FALL 2004

.

MID-TERM EXAMINATION

SEMESTER FALL 2004

CS501-Advance Computer Architecture (S4)

Total Marks:50

Duration:60mins

Maximum Time Allowed: (1 Hour)

Please read the following instructions carefully before attempting any of the

questions:

1. Attempt all questions. Marks are written adjacent to each question.

2. Do not ask any questions about the contents of this examination from anyone.

a. If you think that there is something wrong with any of the questions, attempt it

to the best of your understanding.

b. If you believe that some essential piece of information is missing, make an

appropriate assumption and use it to solve the problem.

c. Write all steps, missing steps may lead to deduction of marks.

3. Exam is Closed Book. No handouts or extra material is allowed in exam hall

other than rough sheet which will be provided by the examiner.

**WARNING: Please note that Virtual University takes serious note of unfair

means. Anyone found involved in cheating will get an `F` grade in this course.

For Teacher’s use only

Question Q1 Q2 Q3 Q4 Q5 Total

Marks

Question No: 1 Marks: 10

Consider a machine having a 200 MHz clock and three instruction types with following parameters. Now

suppose that two different compilers generate code for the same program. The instruction count for each is

given as follows:

Calculate the Execution Time and MIPS for the two code sequences. Th e following information is given:

Question No: 2 Marks: 10

The following figure gives a partial “Alphabetical Listing of the SRC instruction set” along with the

corresponding 5-bit op-codes.

(a) Hand assemble the following SRC assembly language instruction showing all work

and r5, r2, r13

(b) Reverse assemble the following SRC machine language instruction showing all work. The given

number is a hexadecimal number.

A844002Ch

Question No: 3 Marks: 10

Instruction

Type

Code Sequence

from compiler 1

Code Sequence

from compiler 2

Instruction Count

(millions of instructions)

Control Instructions 9 7

ALU Instructions 11 6

Data Transfer Instructions 5 8

Instruction Type CPI

Control 2

ALU 3

Data Transfer 4

The following table shows a partial summary of the ISA for the FALCON-A. Write an assembly language

program using the FALCON-A assembly language to evaluate the expression: z = 9*x + y

Note: x, y and z are names of memory locations. Your program should not change the source operands.

Do not worry about the contents of x and y. There is no need to worry about assembler directives.

Comments in your code may be helpful.

opcode

operand1

operand2 Operand3

const 1

const 2

mnemonic

5bits 3 bits 3 bits 3 bits 5 bits 8 bits

add

addi

sub

subi

mul

div

mov

movi

and

andi

or

ori

shiftl

shiftr

not

asr

jpl

jmi

jnz

jz

jump

call

ret

in

out

store

load

halt

00000

00001

00010

00011

00100

00101

00110

00111

01000

01001

01010

01011

01100

01101

01110

01111

10000

10001

10010

10011

10100

10110

10111

11000

11001

11100

11101

11111

ra

ra

ra

ra

ra

ra

ra

ra

ra

ra

ra

ra

ra

ra

ra

ra

ra

ra

ra

ra

ra

ra

ra

ra

ra

ra

ra

rb

rb

rb

rb

rb

rb

rb

rb

rb

rb

rb

rb

rb

rb

rb

rb

rb

rb

rc

rc

rc

rc

rc

rc

C1

C1

C1

C1

C1

C1

C1

C1

C1

C2

C2

C2

C2

C2

C2

C2

C2

Question No: 4

Marks: 10

The following diagram shows the uni-bus implementation of the FALCON-A CPU.

Write the structural RTL description for the ‘or’ instruction including the instruction fetch phase. Assume

that a timing generator with up to eight timing intervals is available.

Question No: 5 Marks: 10

Write short answers to the following questions:

(a) What are features of superscalar architecture?

(b) What is the difference between VLIW and superscalar architecture?

(c) What is a micro-instruction?

(d) What is a micro-program?

(e) Explain the operation of branch prediction unit.

Education In Pakistan © 2016